Description
54 CY7C451 CY7C453 CY7C454 512x9, 2Kx9, and 4Kx9 Cascadable Clocked FIFOs with Programmable .
The CY7C451, CY7C453, and CY7C454 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read
Logic Block Diagram
D0.
8.
Features
* High-speed, low-power, first-in first-out (FIFO) memories
* 512 x 9 (CY7C451)
* 2,048 x 9 (CY7C453)
* 4,096 x 9 (CY7C454)
* 0.65 micron CMOS for optimum speed/power
* High-speed 83-MHz operation (12 ns read/write cycle time)
* Low power
Applications
* Clock frequencies up to 83.3 MHz are achievable in the standalone configuration, and up to 83.3 MHz is achievable when FIFOs are cascaded for depth expansion. Depth expansion is possible using the cascade input (XI) and cascade output (XO). The XO signal is connected to the XI of the next device, a
