EDD1216AATA Datasheet - Elpida Memory

EDD1216AATA 128M bits DDR SDRAM

The EDD1216AATA is a 128M bits Double Data Rate (DDR) SDRAM organized as 2,097,154 words × 16 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This highspeed data transfer is realized by the 2 bits prefetchpipelined architecture. Data strobe (DQS) bo.

EDD1216AATA Features

* Power supply : VDD ,VDDQ = 2.5V ± 0.2V

* Data rate: 333Mbps/266Mbps (max.)

* Double Data Rate architecture; two data transfers per clock cycle

* Bi-directional, data strobe (DQS) is transmitted /received with data, to be used in capturing data at the receiver

EDD1216AATA-ElpidaMemory.pdf