EDS1216AABH - (EDS1216AABH / EDS1216CABH) 128M bits SDRAM
The EDS1216AABH, EDS1216CABH are 128M bits SDRAM organized as 2,097,152 words × 16 bits × 4 banks.
All inputs and outputs are synchronized with the positive edge of the clock.
Supply voltages are 3.3V (EDS1216AABH) and 2.5V (EDS1216CABH).
They are packaged in 54-ball FBGA.
Pin Configurations /xxx i
EDS1216AABH Features
* 3.3V and 2.5V power supply Clock frequency: 133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently
* Burst read/write operation and burst read/single write operation capability
* Program
