EDS1216AATA - 128M bits SDRAM
The EDS1216AATA is a 128M bits SDRAM organized as 2,097,152 words × 16 bits × 4 banks.
All inputs and outputs are synchronized with the positive edge of the clock.
It is packaged in 54-pin plastic TSOP (II).
Pin Configurations /xxx indicate active low signal.
54-pin Plastic TSOP (II) VDD DQ0 VDDQ
EDS1216AATA Features
* 3.3V power supply Clock frequency: 133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently
* Burst read/write operation and burst read/single write operation capability
* Programmable bur
