EM639165 Datasheet - Etron Technology

EM639165 8M x 16 bit Synchronous DRAM

Table 3. Pin Details Symbol CLK CKE BA0,BA1 A0-A11 CS# RAS# CAS# WE# LDQM, UDQM Type Input Input Input Input Input Input Input Input Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal bur.

EM639165 Features

* Fast access time from clock: 4.5/5/5.4 ns

* Fast clock rate: 200/166/143 MHz

* Fully synchronous operation

* Internal pipelined architecture

* 2M word x 16-bit x 4-bank

* Programmable Mode registers - CAS Latency: 2 or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type

EM639165 Datasheet (810.27 KB)