EM639165TS Datasheet - Etron Technology

EM639165TS 8M x 16 bit Synchronous DRAM

Table 3. Pin Details of EM639165 Symbol CLK CKE BA0,BA1 Type Input Input Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Clock Enable: C.

EM639165TS Features

* Fast access time from clock: 5/5.4 ns

* Fast clock rate: 166/143 MHz

* Fully synchronous operation

* Internal pipelined architecture

* 2M word x 16-bit x 4-bank

* Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full

EM639165TS-EtronTechnology.pdf