56F802 - 16-bit Digital Signal Controllers
* Up to 30 MIPS operation at 60MHz core frequency * Up to 40 MIPS operation at 80MHz core frequency * DSP and MCU functionality in a unified, C-efficient architecture * MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation uni
56F802 Features
* 1.1.1 Processing Core
* Efficient 16-bit 56800 family controller engine with dual Harvard architecture
* As many as 40 Million Instructions Per Second (MIPS) at 80 MHz core frequency
* Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
* Two 36-bit accumul
