56F807 - 16-bit Hybrid Processor

Motorola

56F807 Datasheet Preview — Preview of 56F807 PDF

Datasheet Details

Part number	56F807
Manufacturer	Motorola
File Size	1.12 MB
Description	16-bit Hybrid Processor
Datasheet	56F807_Motorola.pdf

56F807 Product details

Description

Two dedicated General Purpose Quad Timers totaling six pins: Timer C with two pins and Timer D with four pins CAN 2.0 B Module with 2-pin port for transmit and receive Two Serial Communication Interfaces each with two pins (or four additional GPIO lines) Serial Peripheral Interface (SPI) with configurable 4-pin port (or four additional GPIO lines) Computer-Operating Properly (COP) Watchdog timer Two dedic

Features

1.1.1.
Digital Signal Processing Core Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators including extension bits 16-bit bidirectional barrel shifter Parallel instruction set with unique DSP addressing modes Hardware DO and REP loops Three internal ad.

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Published: Nov 9, 2006 |