56F8027 - 16-bit Digital Signal Controllers
of the TMS signal in Table 2-3: Note: Always tie the TMS pin to VDD through a 2.2K resistor.
* Changed the description of the GPIOC4 signal in Table 2-3 (was “the signal goes to both the ANA0 and CMPAI3”, is “the signal goes to both ANB0 and CMPB13”).
Rev.
4 * Changed the ITCN_BASE a
www.DataSheet4U.com 56F8037/56F8027 Data Sheet Technical Data 56F8000 16-bit Digital Signal Controllers MC56F8037 Rev.
6 02/2010 freescale.com www.DataSheet4U.com Document Revision History Version History Rev.
0 Rev.
1 Initial public release.
In Table 10-4, added an entry for flash data retention with less than 100 program/erase cycles (minimum 20 years).
In Table 10-6, changed the device clock speed in STOP mode from 8MHz to 4MHz.
In Table 10-12, changed the
