* Double Late Write mode, Pipelined Read mode
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
* 100 mV core power supply
* 1.8 V CMOS Interface
* ZQ controlled user-selectable output drive strength
* Dual Cycle Deselect
* Burs
GS8330DW72 Datasheet (632.01 KB)
GS8330DW72
GSI Technology
632.01 KB
(gs8330dw36/72) 36m double late write sram.
Preliminary GS8330DW36/72C-250/200 209-Bump BGA Commercial Temp Industrial Temp 36Mb Σ1x1Dp CMOS I/O Double Late Write SigmaRAM™ 200 MHz 250.
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