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GS8330LW36C 36Mb 1x1Lp CMOS I/O Late Write SigmaRAM

GS8330LW36C Description

www.DataSheet4U.com Preliminary GS8330LW36/72C-250/200 209-Bump BGA Commercial Temp Industrial Temp 36Mb Σ1x1Lp CMOS I/O Late Write SigmaRAM™ 200 .
Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.

GS8330LW36C Features

* Late Write mode, Pipelined Read mode
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
* 100 mV core power supply
* 1.8 V CMOS Interface
* ZQ controlled user-selectable output drive strength
* Dual Cycle Deselect
* Burst Read

GS8330LW36C Applications

* and in Flow Through mode NBT SRAMs. SigmaRAM Late Write with Pipelined Read Read CK Deselect Write Read Read Address A XX C D E F ADV /E1 /W DQ QA DC QD CQ Key Hi-Z Access Byte Write Control The Byte Write Enable inputs (Bx) determine which bytes will be written. Any combination of

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Datasheet Details

Part number
GS8330LW36C
Manufacturer
GSI Technology
File Size
635.05 KB
Datasheet
GS8330LW36C_GSITechnology.pdf
Description
36Mb 1x1Lp CMOS I/O Late Write SigmaRAM

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36Mb 1x1Lp CMOS Late Write SigmaRAM GSI Technology
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