* On-Chip ECC with virtually zero SER
* Configurable Read Latency (3.0 or 2.0 cycles)
* Simultaneous Read and Write SigmaDDR-IIIe™ Interface
* Common I/O Bus
* Double Data Rate interface
* Burst of 2 Read and Write
* Pipelined read operation
GS8673ET18BGK Datasheet (271.34 KB)
GS8673ET18BGK
GSI Technology
271.34 KB
72mb sigmaddr-iiie burst of 2 eccram.
GS8673ET18/36BK-675/625/550/500
260-Ball BGA Commercial Temp Industrial Temp
72Mb SigmaDDR-IIIe™ Burst of 2 ECCRAM™
675 MHz
*500 MHz 1.35V V.
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