HD74HCT563 - Octal Transparent Latches (with 3-state outputs)
When the latch enable (LE) input is high, the Q outputs of HD74HCT563 will follow the inversion of the D inputs and the Q outputs of HD74HCT573 will follow the D inputs.
When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enabled returns high again.
When
HD74HCT563 Features
* LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (D to Q, Q) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Cu
