HM62V8512C Datasheet (Hitachi Semiconductor) - 4 M SRAM (512-kword x 8-bit)

HM62V8512C, 4 M SRAM (512-kword x 8-bit)

The Hitachi HM62V8512C is a 4-Mbit static RAM organized 512-kword × 8-bit.

It realizes higher density, higher performance and low power consumption by employing CMOS process technology (6-transistor memory cell).

The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II

HM62V8512C Features

* Single 3.0 V supply: 2.7 V to 3.6 V

* Access time: 55/70 ns (max)

* Power dissipation  Active: 6.0 mW/MHz (typ)  Standby: 2.4 µW (typ)

* Completely static memory. No clock or timing strobe required

* Equal access and cycle times

* Common data input