H57V2582GTR Datasheet (Hynix Semiconductor) - 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O

H57V2582GTR, 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O

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Rev 1.0 / Aug.

2009 1 Synchronous DRAM Memory 256Mbit H57V2582GTR Series www.DataSheet4U.com 111 Document Title 256Mbit (32M x8) Synchronous DRAM Revi

H57V2582GTR Features

* Standard SDRAM Protocol Internal 4bank operation Power Supply Voltage : VDD = 3.3V, VDDQ = 3.3V All device pins are compatible with LVTTL interface Low Voltage interface to reduce I/O power 8,192 Refresh cycles / 64ms Programmable CAS latency of 2 or 3 Programmable Burst Length and Burst Type