Datasheet4U Logo Datasheet4U.com

HC2510

Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

HC2510 Features

* l l l l l l l l l l l Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications Supports PC-100 and Meets “PC100 SDRAM registered DIMM Specification Rev. 1.2” Distributes One Clock Input to One Bank of Ten Outputs No External RC Network Required External Feedback (FBIN) Pin is Used to S

HC2510 General Description

The HC2510C is a low-skew, low jitter, phaselocked loop(PLL) clock driver, distributing high frequency clock signals for SDRAM. The HC2510C operates at 3.3V Vcc and provides integrated series-damping resistors that make it ideal for driving point-to-point loads. The propagation delay from the CLK in.

HC2510 Datasheet (81.20 KB)

Preview of HC2510 PDF

Datasheet Details

Part number:

HC2510

Manufacturer:

Hynix Semiconductor

File Size:

81.20 KB

Description:

Phase-locked loop clock distribution for synchronous dram applications.

📁 Related Datasheet

HC2510C Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications (Hynix Semiconductor)

HC2500 Power Hybrid Circuits (RCA)

HC2500 Multi Purpose Low Distortion 7-Ampere Operational Amplifier (Harris)

HC2500A03 Hybrid Coupler (Yantel)

HC2500E03 Hybrid Coupler (Yantel)

HC2500P03 Hybrid Coupler (Yantel)

HC2500S03 Hybrid Coupler (Yantel)

HC2500U03-050 90 Degree Hybrid (Yantel)

HC2500U03-055 90 Degree Hybrid (Yantel)

HC2509C Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications (Hynix Semiconductor)

TAGS

HC2510 Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications Hynix Semiconductor

Image Gallery

HC2510 Datasheet Preview Page 2 HC2510 Datasheet Preview Page 3

HC2510 Distributor