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HY5S5B2BLFP-SE Datasheet - Hynix Semiconductor

HY5S5B2BLFP-SE 256M (8Mx32bit) Mobile SDRAM

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.0 / Apr. 2006 1 256Mbit (8Mx32bit) Mobile SDR Memory HY5S5B2BLF(P) Series 11 Document Title 4Bank x 2M x 32bits Synchronous DRAM Revision History.

HY5S5B2BLFP-SE Features

* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK)

* MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - Duri

HY5S5B2BLFP-SE Datasheet (663.43 KB)

Preview of HY5S5B2BLFP-SE PDF

Datasheet Details

Part number:

HY5S5B2BLFP-SE

Manufacturer:

Hynix Semiconductor

File Size:

663.43 KB

Description:

256m (8mx32bit) mobile sdram.

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HY5S5B2BLFP-SE 256M 8Mx32bit Mobile SDRAM Hynix Semiconductor

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