Description
256MBit MOBILE SDR SDRAMs based on 4M x 4Bank x16 I/O Specification of 256M (16Mx16bit) Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,19.
and is subject to change without notice.
Features
* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK)
* MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - Duri
Applications
* which requires large memory density and high bandwidth. It is organized as 4banks of 4,194,304x16. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/output data
