HY67V161610D Datasheet - Hynix Semiconductor

HY67V161610D 2 Banks x 512K x 16 Bit Synchronous DRAM

and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied Rev. 3.6/Apr.01 HY57V161610D P IN C O N F IG U R A T IO N VDD DQ0 DQ1 VSSQ DQ2 DQ3 VDDQ DQ4 DQ5 VSSQ DQ6 DQ7 VDDQ LDQM WE CAS RAS CS A11 A10.

www.DataSheet4U.com HY57V161610D 2 Banks x 512K x 16 Bit Synchronous DRAM D E S C R IP T IO N THE Hyundai HY57V161610D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the main memory and graphic applications which require large memory density and high bandwidth. HY57V161610D is organized as 2banks of 524,288x16. HY57V161610D is offering fully synchronous operation referenced to a positive edge clock. All inputs and outputs are synchronized with the rising edge of the clock input.

HY67V161610D Features

* Single 3.0V to 3.6V power supply Note1)

* Auto refresh and self refresh 4096 refresh cycles / 64ms Programmable Burst Length and Burst Type - 1, 2, 4, 8 and Full Page for Sequence Burst All device pins are compatible with LVTTL interface J

HY67V161610D Datasheet (101.43 KB)