8SLVD1204-33 - LVDS Output Fanout Buffer
The 8SLVD1204-33 is a high-performance differential LVDS fanout buffer.
The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
The 8SLVD1204-33 is characterized to operate from a 3.3V power supply.
Guaranteed output-to-output and part-to-part s
8SLVD1204-33 Features
* Four low skew, low additive jitter LVDS output pairs
* Two selectable differential clock input pairs
* Differential PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL
* Maximum input clock frequency: 2GHz
* LVCMOS/LVTTL inte
