8SLVP1212 Datasheet - Renesas

8SLVP1212 LVPECL Output Fanout Buffer

The 8SLVP1212 is a high-performance, 12 output differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1212 is characterized to operate from a 3.3V and 2.5V power supply. Guaranteed output-to-output an.

8SLVP1212 Features

* Twelve low skew, low additive jitter LVPECL outputs

* Two selectable, differential clock inputs

* Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML

* Maximum input clock frequency: 2GHz

* LVCMOS interface levels for the

8SLVP1212-Renesas.pdf