8SLVS1118 Datasheet - IDT

8SLVS1118 Low Additive Jitter LVDS/ LVPECL Fanout Buffer

The 8SLVS1118 is a high-performance, low-power, differential 1:18 output fanout buffer. This highly versatile device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVS111.

8SLVS1118 Features

* ▪ 1:18, low skew, low additive jitter LVPECL/LVDS fanout buffer ▪ Low power consumption ▪ Differential PCLK, nPCLK clock pair accepts the following differential/single-ended input levels: LVDS, LVPECL, and LVCMOS ▪ Maximum input clock frequency: 2GHz ▪ Propagation delay: 290ps (typical) ▪ Output ske

8SLVS1118-IDT.pdf