IS43R16400B Datasheet (ISSI) - Four internal banks for concurrent operation

IS43R16400B, Four internal banks for concurrent operation

A0-A11 A0-A7 BA0, BA1 DQ0 * DQ15 CK, CK CKE CS CAS RAS Row Address Input Column Address Input Bank Select Address Data I/O System Clock Input Clock Enable Chip Select Column Address Strobe Command Row Address Strobe Command WE LDM, UDM LDQS, UDQS VDD VDDQ VSS VSSQ VREF NC Write Enable Data

IS43R16400B Features

* VDD and VDDQ: 2.5V ± 0.2V (-5, -6) VDD and VDDQ: 2.6V ± 0.1V (-4) SSTL_2 compatible I/O Double-data rate architecture; two data transfers per clock cycle Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturin