IS46DR32801B, IS43DR32801B Datasheet - ISSI

IS46DR32801B 256Mb DDR2 DRAM

ISSI's 256Mb DDR2 SDRAM uses a double-data-rate architecture to achieve high-speed operation. The double-data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls. The 256Mb DDR2 SDRAM is provided in a wid.

IS46DR32801B Features

* Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V

* JEDEC standard 1.8V I/O (SSTL_18-compatible)

* Double data rate interface: two data transfers per clock cycle

* Differential data strobe (DQS, DQS)

* 4-bit prefetch architecture

* On chip DLL to align DQ and DQS

IS43DR32801B-ISSI.pdf

IS46DR32801B Datasheet Preview — This datasheet PDF includes multiple part numbers: IS46DR32801B, IS43DR32801B. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

IS46DR32801B, IS43DR32801B

Manufacturer:

ISSI

File Size:

1.19 MB

Description:

256mb ddr2 dram.

Note:

This datasheet PDF includes multiple part numbers: IS46DR32801B, IS43DR32801B.
Please refer to the document for exact specifications by model.

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IS46DR32801B IS43DR32801B 256Mb DDR2 DRAM ISSI

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