IS61QDP2B41M18A Datasheet, Sram, ISSI

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IS61QDP2B41M18A

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ISSI

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📄 Datasheet

Description:

18mb quadp (burst 4) synchronous sram. * 512Kx36 and 1Mx18 configuration available. * On-chip Delay-Locked Loop (DLL) for wide data valid window. * Separate independent re

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IS61QDP2B41M18A

ISSI

📁 Related Datasheet

IS61QDP2B41M18A1 - 18Mb QUADP (Burst 4) SYNCHRONOUS SRAM (ISSI)
IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 , 512Kx36 18Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.0 Cycle Read Latency) OCTOBER 2014 FEATURES D.

IS61QDP2B41M18A2 - 18Mb QUADP (Burst 4) SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B41M18C - 18Mb QUADP SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B41M18C1 - 18Mb QUADP SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B41M18C2 - 18Mb QUADP SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B41M36A - 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B41M36A2 - 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM (ISSI)
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IS61QDP2B42M18A - 36Mb QUADP (Burst 4) SYNCHRONOUS SRAM (ISSI)
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