IS61QDP2B451236C - 18Mb QUADP SYNCHRONOUS SRAM
* 1Mx36 and 2Mx18 configuration available.
* On-chip Delay-Locked Loop (DLL) for wide data valid window.
* Separate independent read and write ports with concurrent read and write operations.
* Synchronous pipeline read with late write operation.
* Double Data Rate (DDR) interfa
