IS61QDPB44M18C Datasheet - ISSI

72Mb QUADP SYNCHRONOUS SRAM

IS61QDPB44M18C Features

* 2Mx36 and 4Mx18 configuration available.

* Separate independent read and write ports with concurrent read and write operations.

* Max. 567 MHz clock for high bandwidth

* Double Data Rate (DDR) interface for read and write input ports.

* 2.5 cycle read latency.

* Fixed 4-bit

IS61QDPB44M18C General Description

The 72Mb IS61QDPB42M36C/C1/C2 and IS61QDPB44M18 C/C1/C2 are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all intern.

IS61QDPB44M18C Datasheet (897.16 KB)

IS61QDPB44M18C Datasheet Preview — Preview of IS61QDPB44M18C PDF

Datasheet Details

Part number:

IS61QDPB44M18C

Manufacturer:

ISSI

File Size:

897.16 KB

Description:

72mb quadp synchronous sram.

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IS61QDPB44M18C 72Mb QUADP SYNCHRONOUS SRAM ISSI

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IS61QDPB44M18C Features

IS61QDPB44M18C General Description

Datasheet Details

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