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ICS93705 - DDR Phase Lock Loop Zero Delay Clock Buffer

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Integrated Circuit Systems

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ICS93705 DDR Phase Lock Loop Zero Delay Clock Buffer by Integrated Circuit Systems - Datasheet Preview — Datasheet preview – ICS93705

Datasheet Details

Part number	ICS93705
Manufacturer	Integrated Circuit Systems
File Size	65.85 KB
Description	DDR Phase Lock Loop Zero Delay Clock Buffer
Datasheet	ICS93705 Datasheet
Additional preview pages of the ICS93705 datasheet.

Product details

Features

Low skew, low jitter PLL clock driver.
I2C for functional and output control.
Feedback pins for input to output synchronization.
Spread Spectrum tolerant inputs.
3.3V tolerant CLK_INT input Switching Characteristics:.
PEAK - PEAK jitter (66MHz): 100MHz):.

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Published: Dec 18, 2005 |