Datasheet Specifications
- Part number
- IDT72V291
- Manufacturer
- Integrated Device Technology
- File Size
- 205.16 KB
- Datasheet
- IDT72V291_IntegratedDeviceTechnology.pdf
- Description
- CMOS FIFO memories
Description
3.3 VOLT CMOS SuperSync FIFO™ 65,536 x 9 131,072 x 9 .EATURES: * * * * * www.DataSheet4U.com IDT72V281 IDT72.
Features
* GH in FWFT mode) temporarily and does not disturb the write pointer, programming method, existing timing mode or programmaApplications
* that need to buffer large amounts of data. The input port is controlled by a Write Clock (WCLK) input and a Write Enable (WEN) input. Data is written into the FIFO on every rising edge of WCLK when WEN is asserted. The output port is controlled by a Read Clock (RCLK) input and Read Enable (REN) inpuIDT72V291 Distributors
📁 Related Datasheet
📌 All Tags