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IS61DDPB21M36A1

36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM

IS61DDPB21M36A1 Features

* DESCRIPTION

* 1Mx36 and 2Mx18 configuration available.

* On-chip Delay-Locked Loop (DLL) for wide data valid window.

* Common I/O read and write ports.

* Synchronous pipeline read with self-timed late write operation.

* Double Data Rate (DDR) interface for read and write input

IS61DDPB21M36A1 General Description


* 1Mx36 and 2Mx18 configuration available.
* On-chip Delay-Locked Loop (DLL) for wide data valid window.
* Common I/O read and write ports.
* Synchronous pipeline read with self-timed late write operation.
* Double Data Rate (DDR) interface for read and write input ports.
* .

IS61DDPB21M36A1 Datasheet (509.19 KB)

Preview of IS61DDPB21M36A1 PDF

Datasheet Details

Part number:

IS61DDPB21M36A1

Manufacturer:

Integrated Silicon Solution

File Size:

509.19 KB

Description:

36mb ddr-iip(burst 2) cio synchronous sram.
IS61DDPB22M18A/A1/A2 IS61DDPB21M36A/A1/A2 2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM (2.5 Cycle Read Latency) ADVANCED INFORMATION JULY .

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IS61DDPB21M36A1 36Mb DDR-IIPBurst CIO SYNCHRONOUS SRAM Integrated Silicon Solution

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