IS61DDPB21M36B1
Integrated Silicon Solution
696.45kb
36mb ddr-iip(burst 2) cio synchronous sram. 1Mx36 and 2Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data valid window. C
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IS61DDPB21M36B - 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB22M18B/B1/B2 IS61DDPB21M36B/B1/B2
2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB21M36A - 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB22M18A/A1/A2 IS61DDPB21M36A/A1/A2
2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB21M36A2 - 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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ADVANCED INFORMATION JULY .
IS61DDPB21M18A - 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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1Mx18, 512Kx36 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB21M18A1 - 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB21M18A/A1/A2 IS61DDPB251236A/A1/A2
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IS61DDPB21M18A2 - 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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IS61DDPB21M18A/A1/A2 IS61DDPB251236A/A1/A2
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2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
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ADVANCED INFORMATION JULY .
IS61DDPB22M18A1 - 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
(Integrated Silicon Solution)
IS61DDPB22M18A/A1/A2 IS61DDPB21M36A/A1/A2
2Mx18, 1Mx36 36Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
(2.5 Cycle Read Latency)
ADVANCED INFORMATION JULY .