IS61DDPB22M18B Datasheet, Sram, Integrated Silicon Solution

✔ IS61DDPB22M18B Features

DESCRIPTION
1Mx36 and 2Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pi

✔ IS61DDPB22M18B Application

where the failure or malfunction of the product can reasonably be expected to cause failure of the life supp

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IS61DDPB22M18B

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Integrated Silicon Solution

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📄 Datasheet

Description:

36mb ddr-iip(burst 2) cio synchronous sram. * 1Mx36 and 2Mx18 configuration available. * On-chip Delay-Locked Loop (DLL) for wide data valid window. * Common I/O read and write

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IS61DDPB22M18B 36Mb DDR-IIPBurst CIO SYNCHRONOUS SRAM Integrated Silicon Solution