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CD40103BMS - CMOS 8-Stage Presettable Synchronous Down Counters

Datasheet Summary

Description

CD40102BMS and CD40103BMS consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero.

The CD40102BMS is configured as two cascaded 4-bit BCD counters, and the CD40103BMS contains a single 8-bit binary counter.

Features

  • High Voltage Type (20V Rating).
  • CD40102BMS: 2-Decade BCD Type.
  • CD40103BMS: 8-Bit Binary Type.
  • Synchronous or Asynchronous Preset.
  • Medium Speed Operation - fCL = 3.6MHz (Typ) at 10V.
  • Cascadable.
  • 100% Tested for Quiescent Current at 20V.
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC.
  • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V.

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Datasheet preview – CD40103BMS

Datasheet Details

Part number CD40103BMS
Manufacturer Intersil Corporation
File Size 166.84 KB
Description CMOS 8-Stage Presettable Synchronous Down Counters
Datasheet download datasheet CD40103BMS Datasheet
Additional preview pages of the CD40103BMS datasheet.

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Full PDF Text Transcription

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CD40102BMS CD40103BMS December 1992 CMOS 8-Stage Presettable Synchronous Down Counters Description CD40102BMS and CD40103BMS consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The CD40102BMS is configured as two cascaded 4-bit BCD counters, and the CD40103BMS contains a single 8-bit binary counter. Each type has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT/ZERO-DETECT output are active-low logic. In normal operation, the counter is decremented by one count on each positive transition of the CLOCK.
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