Datasheet4U Logo Datasheet4U.com

CD40101BMS - CMOS 9-Bit Parity Generator/Checker

Datasheet Summary

Description

The CD40101BMS is a 9-bit (8 data bits plus 1 parity bit) parity generator/checker.

It may be used to detect errors in data transmission or data retrieval.

Odd and even outputs facilitate odd or even parity generation and checking.

Features

  • Pinout.
  • High Voltage Type (20V Rating).
  • 100% Tested for Quiescent Current at 20V CD40101BMS TOP VIEW.
  • 5V, 10V and 15V Parametric Ratings.
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC.
  • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V.
  • Standardized Symmetrical Output Characteristics D1 1 D2 2 D3 3 D4 4 D9 5 ODD OUT 6 VSS 7 14 VDD 13.

📥 Download Datasheet

Datasheet preview – CD40101BMS

Datasheet Details

Part number CD40101BMS
Manufacturer Intersil
File Size 104.48 KB
Description CMOS 9-Bit Parity Generator/Checker
Datasheet download datasheet CD40101BMS Datasheet
Additional preview pages of the CD40101BMS datasheet.

📁 Similar Datasheet

  • CD40101B - CMOS 9-Bit Parity Generator/Checker (RCA)
  • CD40100B - CMOS 32-Stage Static Left/Right Shift Register (RCA)
  • CD40100BMS - CMOS 32-Stage Static Left/Right Shift Register (Intersil Corporation)
  • CD40102B - CMOS 8-Stage Presettable Synchronous Down Counters (Texas Instruments)
  • CD40102B - CMOS 8-Stage Presettable Synchronous Down Counters (RCA)
  • CD40102BE - CMOS 8-Stage Presettable Synchronous Down Counters (Texas Instruments)
  • CD40102BMS - CMOS 8-Stage Presettable Synchronous Down Counters (Intersil Corporation)
  • CD40103B - CMOS 8-Stage Presettable Synchronous Down Counters (Texas Instruments)
  • CD40103B - CMOS 8-Stage Presettable Synchronous Down Counters (RCA)
  • CD40103BE - CMOS 8-Stage Presettable Synchronous Down Counters (Texas Instruments)
Other Datasheets by Intersil
  • CD4007A - CMOS Dual Complementary Pair Plus Inverter
  • CD4049UBMS - CMOS Hex Buffer/Converter
  • CD4050A - CMOS Hex Buffer / Converters
  • CD4050B - CMOS Hex Buffer / Converters

Full PDF Text Transcription

Click to expand full text
CD40101BMS December 1992 CMOS 9-Bit Parity Generator/Checker Features Pinout • High Voltage Type (20V Rating) • 100% Tested for Quiescent Current at 20V CD40101BMS TOP VIEW • 5V, 10V and 15V Parametric Ratings • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Standardized Symmetrical Output Characteristics D1 1 D2 2 D3 3 D4 4 D9 5 ODD OUT 6 VSS 7 14 VDD 13 D8 12 D7 11 D6 10 D5 9 EVEN OUT 8 INHIBIT • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Description The CD40101BMS is a 9-bit (8 data bits plus 1 parity bit) parity generator/checker.
Published: |