CD4015BMS - CMOS Dual 4-Stage Static Shift Register

Intersil Corporation

CD4015BMS Datasheet Preview — Preview of CD4015BMS PDF

Datasheet Details

Part number	CD4015BMS
Manufacturer	Intersil Corporation
File Size	118.73 KB
Description	CMOS Dual 4-Stage Static Shift Register
Datasheet	CD4015BMS_IntersilCorporation.pdf

CD4015BMS Product details

Description

of ‘B’ Series CMOS Devices” Functional Diagram VDD 16 DATA A CLOCK A RESET A 7 9 6 4 STAGE 5 4 3 10 DATA B 15 1 14 RESET B 4 STAGE 13 12 Q2B 11 Q3B 2 Q4B 8 VSS Q1A Q2A Q3A Q4A Q1B Applications Serial-Input/Parallel-Output Data Queueing Serial to Parallel Data Conversion General-Purpose Register Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers.Each register has independent CLOCK and RESET inputs as well

Features

High-Voltage Type (20V Rating).
Medium Speed Operation 12MHz (typ. ) Clock Rate at VDD - VSS = 10V.
Fully Static Operation.
8 Master-Slave Flip-Flops Plus Input and Output Buffering.
100% Tested For Quiescent Current at 20V.
5V, 10V and 15V Parametric Ratings.
Standardized Symmetrical Output Characteristics.
Maximum Input Current of 1µA at 18V Over Full Package-Temperature Range; 100nA at 18V and 25oC.
Noise Margin.

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Published: Mar 23, 2005 |