HI3197 - 125 MSPS D/A Converter
and I/O Pin Equivalent Circuits PIN NO 1 to 6 45 to 48 7 to 16 SYMBOL DA0 to DA9 DB0 to DA9 I/O I I TYPICAL VOLTAGE LEVEL TTL DVCC1 EQUIVALENT CIRCUIT DESCRIPTION Side A Data Input.
Side B Data Input.
TTL 1 TO 6 VREF 7 TO 16 45 TO 48 DGND1 17 DIV2IN I TTL DVCC1 1/ Frequency-Divided Clock
HI3197 Data Sheet October 1998 File Number 4356.1 10-Bit, 125 MSPS D/A Converter The HI3197 is a high-speed D/A converter which can perform the multiplexed input of the two system 10-bit data.
The maximum conversion rate achieves 125 MSPS.
The multiplexed operation is possible by the 1/2 frequencydivided clock or by halving the frequency of the clock with the clock frequency divider circuit having the reset pin in the IC.
The data input is TTL; the clock input pin and reset input pin can select
