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HSP50210 - Digital Costas Loop

Datasheet Summary

Description

NAME VCC GND IIN9-0 QIN9-0 SYNC COF TYPE I I I O +5V Power Supply.

Ground.

In-Phase Parallel Input.

Features

  • Clock Rates Up to 52MHz.
  • Selectable Matched Filtering with Root Raised Cosine or Integrate and Dump Filter.
  • Second Order Carrier and Symbol Tracking Loop Filters.
  • Automatic Gain Control (AGC).
  • Discriminator for FM/FSK Detection and Discriminator Aided Acquisition.
  • Swept Acquisition with Programmable Limits.
  • Lock Detector.
  • Data Quality and Signal Level Measurements.
  • Cartesian to Polar Converter.
  • 8-Bit Micro.

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Datasheet preview – HSP50210

Datasheet Details

Part number HSP50210
Manufacturer Intersil Corporation
File Size 326.89 KB
Description Digital Costas Loop
Datasheet download datasheet HSP50210 Datasheet
Additional preview pages of the HSP50210 datasheet.

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Full PDF Text Transcription

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HSP50210 Data Sheet January 1999 File Number 3652.4 Digital Costas Loop The Digital Costas Loop (DCL) performs many of the baseband processing tasks required for the demodulation of BPSK, QPSK, 8-PSK, OQPSK, FSK, AM and FM waveforms. These tasks include matched filtering, carrier tracking, symbol synchronization, AGC, and soft decision slicing. The DCL is designed for use with the HSP50110 Digital Quadrature Tuner to provide a two chip solution for digital down conversion and demodulation. The DCL processes the In-phase (I) and quadrature (Q) components of a baseband signal which have been digitized to 10 bits.
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