HSP50210 Datasheet - Intersil Corporation

HSP50210 Digital Costas Loop

NAME VCC GND IIN9-0 QIN9-0 SYNC COF TYPE I I I O +5V Power Supply. Ground. In-Phase Parallel Input. Data may be two’s complement or offset binary format (see Table 14). These inputs are sampled by CLK when the SYNC signal is active Low. IIN9 is the MSB. See Input Controller Section. Quadrature Paral.

HSP50210 Data Sheet January 1999 File Number 3652.4 Digital Costas Loop The Digital Costas Loop (DCL) performs many of the baseband processing tasks required for the demodulation of BPSK, QPSK, 8-PSK, OQPSK, FSK, AM and FM waveforms. These tasks include matched ﬁltering, carrier tracking, symbol synchronization, AGC, and soft decision slicing. The DCL is designed for use with the HSP50110 Digital Quadrature Tuner to provide a two chip solution for digital down conversion and demodulation. The D.

HSP50210 Features

* Clock Rates Up to 52MHz

* Selectable Matched Filtering with Root Raised Cosine or Integrate and Dump Filter

* Second Order Carrier and Symbol Tracking Loop Filters

* Automatic Gain Control (AGC)

* Discriminator for FM/FSK Detection and Discriminator Aided Ac

HSP50210 Datasheet (326.89 KB)