HSP50216 Datasheet - Intersil Corporation

HSP50216 Four-Channel Programmable Digital DownConverter

NAME POWER SUPPLY VCC GND INPUTS A(15:0) B(15:0) C(15:0) D(15:0) ENIA ENIB ENIC ENID CONTROL CLK SYNCI I I Input clock. All processing in the HSP50216 occurs on the rising edge of CLK. Synchronization Input Signal. Used to align the processing with an external event or with other HSP50216 devices. .

HSP50216 P RE L I M I NA R Y Data Sheet February 2000 File Number 4557.2 Four-Channel Programmable Digital DownConverter The HSP50216 Quad Programmable Digital DownConverter (QPDC) is designed for high dynamic range applications such as cellular basestations where multiple channel processing is required in a small physical space. The QPDC combines into a single package, a set of four channels which include: digital mixers, a quadrature carrier NCO, digital ﬁlters, a resampling ﬁlter, a Cart.

HSP50216 Features

* Up to 70MSPS Input

* Four Independently Programmable Downconverter Channels in a single package

* Four Parallel 16-Bit Inputs -Fixed or Floating Point Format

* 32-Bit Programmable Carrier NCO with > 115dB SFDR

* 110dB FIR Out of Band Attenuation

* De

HSP50216_IntersilCorporation.pdf