HSP9520 Datasheet - Intersil Corporation

HSP9520 - Multilevel Pipeline Registers

NAME VCC GND CLK DIP PIN 24 12 11 I TYPE DESCRIPTION The +5V Power Supply Pin. A 0.1µF capacitor between the VCC and GND pin is recommended. The device ground. Input Clock. Data is latched on the low to high transition of this clock signal. Input setup and hold times with respect to the clock must .

HSP9520, HSP9521 Data Sheet May 1999 File Number 2811.5 Multilevel Pipeline Registers These devices are multilevel pipeline registers implemented using a low power CMOS process. They are pin for pin compatible replacements for industry standard multilevel pipeline registers such as the L29C520 and L29C521. The HSP9520 and HSP5921 are direct replacements for the AM29520 and AM29521 and WS59520 and WS59521. They consist of four 8-bit registers which are dual ported. They can be conﬁgured as a sin.

HSP9520 Features

* Four 8-Bit Registers

* Hold, Transfer and Load Instructions

* Single 4-Stage or Dual-2 Stage Pipelining

* All Register Contents Available at Output

* Fully TTL Compatible

* Three-State Outputs

* High Speed, Low Power CMOS Applications

HSP9520_IntersilCorporation.pdf