ISL22326WM Datasheet - Intersil

ISL22326WM Dual Digitally Controlled Potentiometers

TSSOP PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL VCC SHDN RH0 RL0 RW0 A2 SCL SDA GND RW1 RL1 RH1 A0 A1 GND DESCRIPTION Power supply pin Shutdown active low input “High” terminal of DCP0 “Low” terminal of DCP0 “Wiper” terminal of DCP0 Device address input for the I2C interface Open drain I2C inte.

DATASHEET ISL22326WM Dual Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power, I2C Bus, 128 Taps FN6623 Rev 1.00 November 11, 2011 The ISL22326WMVEP integrates two digitally controlled potentiometers (XDCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the I2C bus interface. Each potenti.

ISL22326WM Features

* Specifications per DLA VID V62/08604-01XE

* Full Mil-Temp Electrical Performance from -55°C to +125°C

* Controlled Baseline with One Wafer Fabrication Site and One Assembly/Test Site

* Full Homogeneous Lot Processing in Wafer Fab

* No Combination of Wafer Fa

ISL22326WM-Intersil.pdf