DS28CN01 - 1Kbit I2C/SMBus EEPROM
The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the Federal Information Publications (FIPS) 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1).
The memory is organized as four 32-byte pages.
Data copy protection and EPROM emul
DS28CN01 Features
* are supported for each memory page. Each DS28CN01 has a guaranteed unique factory-programmed 64-bit registration number. Communication with the DS28CN01 is accomplished through an industrystandard I2C-compatible and SMBus™-compatible interface. The SMBus timeout feature resets the device’s interface
