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MAX3638 Programmable Clock Generator

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Description

19-4910; Rev 0; 10/09 www.DataSheet4U.com Low-Jitter, Wide Frequency Range, Programmable Clock Generator with 10 Outputs General .
The MAX3638 is a highly flexible, precision phaselocked loop (PLL) clock generator optimized for the next generation of network equipment that demands.

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Features

* subpicosecond jitter generation, excellent power-supply noise rejection, and pin-programmable LVDS/LVPECL output interfaces. The MAX3638 provides nine differential outputs and one LVCMOS output, divided into three banks. The frequency and output interface of each output bank can be individually prog

Applications

* Ethernet Switch/Router Wireless Base Station PCIeM, Network Processors DDR/QDR Memory Typical Application Circuits and Pin Configuration appear at end of data sheet. Ordering Information PART MAX3638ETM+ TEMP RANGE -40NC to +85NC PIN-PACKAGE 48 TQFN-EP
* +Denotes a lead(Pb)-free/RoHS-compliant

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