MAX8550A Datasheet - Maxim Integrated Products

MAX8550A Intergrated DDR Power-Solution

The MAX8550A integrates a synchronous-buck PWM controller to generate VDDQ, a sourcing and sinking LDO linear regulator to generate VTT, and a 10mA reference output buffer to generate VTTR. The buck controller drives two external n-channel MOSFETs to generate output voltages down to 0.7V from a 2V t.

MAX8550A Features

* make the MAX8550A ideally suited for DDR memory applications in desktops, notebooks, and graphic cards. The PWM controller in the MAX8550A utilizes Maxim’s proprietary Quick-PWM™ architecture with programmable switching frequencies of up to 600kHz. This control scheme handles wide input/output volta

MAX8550A_MaximIntegratedProducts.pdf