Datasheet Specifications
- Part number
- MAX3872
- Manufacturer
- Maxim
- File Size
- 0.97 MB
- Datasheet
- MAX3872_MaximIntegratedProducts.pdf
- Description
- Multirate Clock and Data Recovery
Description
19-2709; Rev 1; 5/03 KIT ATION EVALU E L B A IL AVA Multirate Clock and Data Recovery with Limiting Amplifier General .
Features
* o Multirate Data Input: 2.667Gbps (FEC), 2.488Gbps, 1.244Gbps, 622.08Mbps, 155.52Mbps, 1.25Gbps/2.5Gbps (Ethernet) o Reference Clock Not Required for Data Acquisition o Exceeds ANSI, ITU, and Bellcore SONET/SDH Jitter Specifications o 2.7mUIRMS Jitter Generation o 10mVP-P Input Sensitivity Without TApplications
* Without using an external reference clock, the fully integrated phaselocked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The input data is then retimed by the recovered clock, providing a clean data output. An additional serial input (SLBI±) is available for systemMAX3872 Distributors
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