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MAX3877 - Clock and Data Retiming ICs

MAX3877 Description

19-2062; Rev 0; 5/01 2.5Gbps, +3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust General .
The MAX3877/MAX3878 are compact, low-power clock recovery and data retiming ICs for 2.

MAX3877 Features

* o Exceeds ANSI, ITU, and Bellcore SONET/SDH Specifications o Adjustable Input Threshold (±180mV) o 10mVp-p to 1.2Vp-p Differential Input Range o 540mW Power Dissipation (at +3.3V) o Fully Integrated Clock Recovery and Data Retiming o Optional Holdover Capability (Using External Reference Clock) o 0.

MAX3877 Applications

* The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock. An additional 2.488Gbps serial input is available for system loopback diagnostic testing, or this input can be connected to a 155MHz reference cl

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