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PL685-28 19MHz to 250MHz Low Phase-Noise XO

PL685-28 Description

(Preliminary) PL685-28 FE AT UR E S 19MHz to 250MHz Low Phase-Noise XO PAD CONFIGURATION * < 0.6ps RMS phase jitter (12kHz to 20MHz) at 155.52M.
The PL685-28 is a Dual LC core monolithic IC clock, capable of maintaining sub-1ps RMS phase jitter, while covering a wide frequency output range up t.

PL685-28 Features

* horized for use as critical components in life support devices or systems wi thout the express written approval of the President of Micrel Inc. Micrel Inc.
* 2180 F

PL685-28 Applications

* such as Fiber Channel, serial ATA, Ethernet, SAN, SONET/SDH, etc. 88.6 mil XIN XOUT 65 mil SCLK 9 8 Die ID OE/PDB/ SDIO DNC 10 11 GND_ANA GND_DIG GND_BUF 12 13 14 (0,0) PL685 (1650,2250) 7 6 VDD_ANA 5 VDD_DIG 4 VDD_BUF 3 QB 2 VDD_BUF 1Q DIE SPECIFICATIONS Name Size Reverse side Pad dime

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Datasheet Details

Part number
PL685-28
Manufacturer
Micrel
File Size
326.49 KB
Datasheet
PL685-28-Micrel.pdf
Description
19MHz to 250MHz Low Phase-Noise XO

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19MHz 250MHz Low Phase-Noise Micrel
Micrel PL685-28-like datasheet