SP8400 - Very Low Phase Noise Synthesiser Divider
synthesiser divider The divider is based on a divide by 8/9 modulus prescaler, and a 12 stage control counter.
This gives minimum fractional * N division ratio of 64 (56 for general division), and a maximum division ratio of 4103.
The inputs to the control counter are TTL/ CMOS compatible.
SP8400 Very Low Phase Noise Synthesiser Divider DS3739 - 2.1 April 1994 The SP8400 is a very low phase noise programmable divider which is based on a divide by 8/9 dual modulus prescaler and a 12 stage control counter.
This gives a minimum division ratio of 56 (64 for fractional - N synthesis applications), and a maximum division ratio of 4103.
Special circuit techniques have been used to reduce the phase noise considerably below that produced by standard dividers.The data inputs are CMOS or TT
SP8400 Features
* s Very low Phase Noise (Typically -156dBc/Hz at 1kHz offset) s Supply Voltage 5V ABSOLUTE MAXIMUM RATINGS Supply Voltage Output Current Storage Temperature Range Maximum Clock Input Voltage 6.5V 20mA -55°C to +125°C 2.5V p-p MP28 Fig.1 Pin connections - top view ORDERING INFORMATION SP8400 KG MP
