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M5M4V64S30ATP-12 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

M5M4V64S30ATP-12 Description

SDRAM (Rev.0.2) Jan'97 Preliminary MITSUBISHI LSIs M5M4V64S30ATP-8, -10, -12 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM PRELIMINARY Some .
The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface.

M5M4V64S30ATP-12 Features

* - Single 3.3v±0.3v power supply - Clock frequency 125MHz / 100MHz / 83MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8 (programmable) - Burst type- sequential / interl

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64M 4-BANK 2097152-WORD 8-BIT Synchronous DRAM Mitsubishi
Mitsubishi M5M4V64S30ATP-12-like datasheet