M5M4V64S30ATP-8L, M5M - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM

Mitsubishi

Datasheet Details

Part number	M5M4V64S30ATP-8L, M5M
Manufacturer	Mitsubishi
File Size	1.06 MB
Description	64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Datasheet	M5M-4V64S.pdf
Note	This datasheet PDF includes multiple part numbers: M5M4V64S30ATP-8L, M5M. Please refer to the document for exact specifications by model.

The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface.

- Single 3.3v±0.3v power supply - Clock frequency 125MHz /100MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/Full Page (programmable) - Burst type- sequential / interleave (programmable) - Column access - random - Burst Write / Single Write (programmable) - Auto precharge / All bank precharge controlled by A10 - Auto refresh and Self refresh - 4096 refresh cycles.

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Other Datasheets by Mitsubishi

M5M4V64S30ATP-8 - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
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Published: Apr 26, 2005 |