M5M4V64S30ATP-8A
Mitsubishi
1.06MB
64m (4-bank x 2097152-word x 8-bit) synchronous dram. The M5M4V64S30ATP is a 4-bank x 2097152-word x 8-bit Synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to
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📁 Related Datasheet
M5M4V64S30ATP-8 - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
(Mitsubishi)
SDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S30ATP-8, -10, -12
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
PRELIMINARY
Some .
M5M4V64S30ATP-8L - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
(Mitsubishi)
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Some of contents are .
M5M4V64S30ATP-10 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
.
M5M4V64S30ATP-10L - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
(Mitsubishi)
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
Some of contents are .
M5M4V64S30ATP-12 - 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
(Mitsubishi)
SDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S30ATP-8, -10, -12
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
PRELIMINARY
Some .
M5M4V64S20ATP-10 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
SDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S20ATP-8, -10, -12
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
PRELIMINARY
Some.
M5M4V64S20ATP-10L - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar98
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
Some of contents are s.
M5M4V64S20ATP-12 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
SDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S20ATP-8, -10, -12
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
PRELIMINARY
Some.
M5M4V64S20ATP-8 - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
SDRAM (Rev.0.2) Jan'97 Preliminary
MITSUBISHI LSIs
M5M4V64S20ATP-8, -10, -12
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
PRELIMINARY
Some.
M5M4V64S20ATP-8A - 64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
(Mitsubishi)
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar98
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
Some of contents are s.