* - Single 3.3v±0.3v power supply - Clock frequency 125MHz /100MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/Full Page (programmable) - Burst type- sequential / inter
M5M4V64S30ATP-8A Datasheet (1.06 MB)
M5M4V64S30ATP-8A
Mitsubishi
1.06 MB
64m (4-bank x 2097152-word x 8-bit) synchronous dram.
MITSUBISHI LSIs SDRAM (Rev.1.3) Mar'98
M5M4V64S30ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
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